Field-Effect Transistor Assignment - Teesside University, UK
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Questions -
Q1. (a) FIGURE 1 shows a single-stage JFET amplifier circuit. The n-channel JFET has the ratings and characteristics given in the table below.
Answer - Determine the following for the circuit given below.
R1
|
1MΩ
|
R2
|
120KΩ
|
RD
|
2.2KΩ
|
RS
|
1.8KΩ
|
VDD
|
24V
|
IDSS
|
Min value = 2µA and max value = 30 µA
|
Vp
|
Min value = -1V and max value = -8V
|
(i) Show that the quiescent gate-to-source voltage is given by: VGSQ = 2.57 - IDQRS
Answer - As we know VG = (R2 VDD)/(R1+R2) = (120×103×24)/(1×106 + 120×103) = 2.57V
VGS = VG - IDRS
VGS = 2.57 - IDRS
VGSQ = 2.57V- IDQRS
(ii) Determine the maximum quiescent drain current and drain-to-source voltage of the MET, using the 'square law' model of the device: ID(SAT) = IDSS(1 - (VGS/VP))2
Answer - As given in the circuit
ID(sat) = IDSS[1-(VGS/VP)]2
Parameters
|
Min value
|
Max value
|
IDSS
|
2
|
30
|
Vp
|
-1
|
-8
|
So ID(sat) = 2×10-3 × [1-(-2.57/-8)]2
= 2×10-3 × 0.4624
= 0.9248 mA
Now VDS = VDD - ID(RD+RS)
VDS = 24 - 0.9248×10-3 (2.2KΩ+1.8KΩ)
= 24 - 3.69
=20.31V
(b) An LED works most consistently (giving a steady light output) if the current passing through it can be maintained constant, even if the supply voltage changes, for example, as the battery discharges over time. The circuit of FIGURE 2 shows a JFET being used as a constant source to drive an LED.
Determine a suitable value for RS if the LED requires a constant current of 5 mA and the JEFT has an IDSS value of 10 mA and a pinch of voltage of -3 V.
Answer - In the given circuit we can understood that ID = 5mA
VGS = -ID × RS
ID(sat) = IDSS[1-(VGS/VP)]2
5mA = 10mA× [1-(VGS/-3)]2
[1-(VGS/-3)]2 = 0.5
[1+(VGS/3)] = √0.5 = 0.707
VGS/3 = 0.707 - 1 = -0.293
VGS = 0.879V
VGS = -ID × RS
RS = 175.8Ω
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Q2. (i) It is found that, when a MOSFET is operated in its saturation region, the drain current is related to the gate-to-source voltage by the equation: ID = β/2(VGS - VT)2
State upon which physical attributes of the transistor the value of β depends.
Answer - It is given in the question that
ID = β/2 × (VGS - VT)2
β depends on ID(on)/(VGS(on) - VT)2
(ii) In comparing the behaviour of an n-channel MOSFET with a p-channel device having identical geometry and threshold voltage, it is found that the n-channel FET has a greater drain current than that of the p-channel FET. State why this should be so and give one other characteristic in which the two devices would differ.
Answer - Comparison
N channel
|
P channel
|
Easier for bulk production now a days
|
Not produced now
|
Lesser area
|
Occupies larger area
|
Fast switching devices
|
Not at all faster
|
Low on resistance
|
High on resistance
|
High packaging density
|
Low
|
(iii) FIGURE 3 shows a logic gate built from MOSFETs. Copy and complete the table and hence determine the type of logic gate.
Answer - Table
A
|
B
|
T6
|
T5
|
T4
|
T3
|
T2
|
T1
|
F
|
0
|
0
|
OFF
|
OFF
|
ON
|
ON
|
ON
|
OFF
|
1
|
0
|
1
|
OFF
|
ON
|
OFF
|
ON
|
ON
|
OFF
|
1
|
1
|
0
|
ON
|
OFF
|
ON
|
OFF
|
ON
|
ON
|
1
|
1
|
1
|
ON
|
ON
|
OFF
|
OFF
|
OFF
|
ON
|
1
|
(iv) In order to increase the packing density, or the number of devices per unit area, that can be achieved on an integrated circuit, the supply voltage has been reduced. Very large scale integrated circuits (VLSI) now work at a 3.3 V supply or below.
Give two reasons why it has been necessary to reduce the supply voltage in order to achieve a higher packing density on the 'chip'.
Answer - In order to achieve high packaging density the supply voltage need to be reduced. So that more number of performance can be achieved. Also the device will be faster.
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